Semiconductors - The Worlds Most Important Sector
From fabless to foundry, AI to analog, geopolitics to growth, your investor’s field guide to the most important industry on Earth.
If you invest with a one-dimensional lens, you’ll forever be at the mercy of headlines.
The best investors and thinkers, whether in science, art, or capital markets, understood that knowledge doesn’t exist in silos.
Leonardo da Vinci fused engineering with art. Newton married physics with mathematics. Charlie Munger called it a “latticework of mental models.”
The lesson is clear: the world is interconnected, and to thrive, your thinking must be too.
Nowhere is this more apparent than in semiconductors. This sector isn’t just another corner of the market; it is the foundation upon which modern civilization is built.
A single chip shortage can ripple across global supply chains, shut down factories, and reshape geopolitical alliances.
Understanding semiconductors isn’t optional; it’s the difference between seeing the world in high resolution versus living in the blur.
This joint post with OZECO dives into one of the most critical yet misunderstood industries on the planet.
Together, we explore:
How the semiconductor supply chain is structured across regions and why it matters.
The Fabless vs. Foundry model and why they dominate capital intensity like no other sector.
China’s dual strategy: defensive self-sufficiency and offensive global leverage.
The U.S. reshoring drive and its investment implications.
At The Small Cap Strategist, we’ve made it our mission to uncover hidden opportunities before the crowd. In recent months, we’ve published over a dozen sector deep-dives, our most recent ones include:
and stock-specific analyses. For example, our work on Asseco Poland (WSE: ACP) highlighted an overlooked software ecosystem with 60% recurring revenue, mission-critical moats, the catalytic involvement of Constellation Software’s Topicus subsidiary, a shift markets have barely woken up to, and most recently, Whitbread PLC, a company with a market cap the same valuation as its assets with a free compounding business alongside it.
Our research community is built for investors who want an edge:
Institutional-grade analysis usually locked behind paywalls.
Unrivaled diligence, creative, painstaking work others avoid.
A proven record: over 9 out of 10 of our identified equities have generated net gains and consistently beaten the S&P 500.
This isn’t just research, it’s a blueprint for compounding wealth with conviction.
If you want to understand not only where semiconductors are headed, but also how to capture the hidden compounding opportunities in global markets, subscribe to The Small Cap Strategist and Ozeco.
The semiconductor supply chain
4 steps to make chips:
Design: Semiconductor chips design are created for either specific or general usage. The companies involved in this step are fabless companies (semi companies that only focus on the design and don’t own factories, think of Nvidia, Broadcom etc), electronics manufacturers and independent design companies.
Manufacturing front end: Silicon wafers are processed through a complex and extensive series of manufacturing steps. Each wafer is then diced into multiple chips. The companies specialized in the fabrication of chips are foundries (think TSMC) or integrated device manufacturers (IDMs, like Texas Instruments or Infineon, which do everything from the design to the manufacturing and packaging of their chips, usually focused on mature/analog chips like for auto or industrial applications).
Manufacturing back end: Chips are assembled into packages to form electronic components that can be mounted onto circuit boards. Packaged chips are then tested under different electrical and temperature conditions. One type of company is specialized in this back end work, Outsourced semiconductor assembly & test (OSATs, like Amkor or ASE, they work with everyone).
End product integration: Chips are integrated by EMS and OEM companies to create most of the products we use around us (electronics, cars, white goods, data centers and other products for our digital infrastructure, capital goods etc).
The semiconductor industry is one, if not the most, globalized and interconnected sector in the world.
Regions specialize in different activities of the value chain:
There are multiples points of high geographic concentration across the current semiconductor supply chain:
Tariffs and heightening geopolitical tensions, especially the technology war between the US and China, which is defining this period in history, are putting pressure on the semiconductor value chain, triggering an arms race and driving a reshoring and greater regionalization of the semiconductor sector.
Technology complexity and need for scale have led to emergence of business models focused on a specific layer of the value chain.
Take advantage of this once in a generation opportunity to build long term wealth by investing in great stocks that will deliver returns for your portfolio for years to come.
Join as a subscriber today to get access to institutional level research helping you own equities you understand and learn about the trends, technologies and companies that will underpin the value creation of the next decades
What is a chip? The backbone of modern society
A chip is a tiny black square.
Electronic circuits printed on round silicon wafers that are then cut into rectangular dies.
Packages protect and connect the bare chips with the external world.
A chip is a stack of layers.
Bottom of the chip: the substrate (silicon) with critical engraving sizes (the transistors, elementary blocks), we try to make the transistors as small as possible.
Top of the chip: the more we go up in the layers, the less the size of the engravings is small.
Middle of the chip: connections between layers / transistors with copper, cobalt, tungsten.
For each new node, the number of layers increases by 10%:
7nm: 94 layers
5nm: 110-115 layers
At the bottom of the chip is the transistor, the elementary brick: a switch with 0 or 1 (think of a light switch).
A chip is a lego with very small blocks: the goal is to assemble billions of transistors together (20bn in the most advanced semiconductors).
Semiconductor value chain: From sand to electronics
ASML is at the centre of the semiconductor value chain. ASML makes essential lithography machines ($20bn market part of the +$80bn front end WFE market) that foundries use to print integrated circuits (chips) on silicon wafers.
Upstream - manufacturers of silicon wafers: slices of semiconductor material mostly made in Japan and South Korea by Shin Etsu, Sumco, Globalsemi.
Downstream - foundries & IDMs:
Foundries (TSMC, GlobalFoundries, Intel and Samsung) that specialize in manufacturing chips designed by other companies (Qualcomm, Broadcom, Apple).
IDMs (integrated semiconductor manufacturers like Infineon, STM) that do everything in house from design, fabrication and assembly and test of their chips.
The three semi broad categories of semiconductor products:
Logic (42% of industry revenues):
These are integrated circuits functioning on binary codes (0 and 1) that serve as the fundamental building blocks or "brains" of computing.
Microprocessors such as central processing units (CPUs), graphics processing units (GPUs) and application processors (APs). Applications include processors for mobile phones, personal computers, servers, Al systems, and supercomputers.
Microcontrollers (MCUs) are small computers on a single chip. MCUs perform basic computing tasks in myriads of electronic products such as cars, industrial automation equipment or consumer appliances.
Memory (26% of industry revenues):
These are used for storing information necessary to perform any computation.
DRAM is used to store the data or program code needed by a computer, PCs, servers, Smartphones, processor to function. There is also an increasing need for DRAM in automobile electronics applications such as advanced driver-assistance systems (ADAS).
NAND is the most common type of flash memory. Unlike DRAM, it does not need power to retain data, so it is used for permanent storage. Typical applications include solid state drives (SSDs) used as laptop hard drives or secure digital (SD) cards used in portable devices.
Discrete, Analog, and Other (32% of the industry revenues):
These are semiconductors that transmit, receive, and transform information dealing with continuous parameters such as temperature and voltage.
Discrete include diodes and transistors that are designed to perform a single electrical function.
Analog include voltage regulators and data converters that translate analog signals from sources such as voice into digital signals. This category also includes power management integrated circuits found in any type of electronic device, and radio frequency (RF) semiconductors that enable smartphones to receive and process the radio signals coming from the base stations of cellular networks.
Leading edge and mature nodes: Different needs for different markets
For leading edge (like AI data center or smartphone chips), Moore's Law is king - doubling the number of transistors every 2 years, and is even accelerating in the age of AI.
The objective is miniaturization and performance: packing as many transistors as possible on an increasingly smaller chip to increase computing power.
Driving performance and power improvements, but also gen-on-gen cost savings as transistor shrink led to die shrink and drove significant increases in the number of chips manufacturable on a single wafer, saving significant costs.
Using both DUV and EUV lithography tools, the number of EUV layers rises as the chips get smaller.
For a time, investors thought that Moore’s Law was dead: it was becoming too expensive to go from one node to the next and shrink transistors (3nm to 2nm for example). Investors therefore looked more at vertical technologies that allowed them to fit more chips within the same volume/package like advanced packaging (vs technologies to shrink chips like ASML’s lithography.
But Moore’s Law is in fact more alive than ever in the age of AI: ASML at its CMD has demonstrated that Al is accelerating Moore's Law (computing power increasing 16x every 2 years, 8x faster than mainstream semis and energy consumption 5x every 2 years vs 0.6x for rest). With the proliferation of Al, lithography will be more important than ever to bring costs and energy consumption under control, this explains the tech roadmap acceleration at foundries and memory companies
We made a sector deep dive on the infrastructure needs with investment opportunities in Chile’s Copper which you can find here:
Legacy nodes are optimized for energy efficiency, durability and reliability:
Innovation comes from increased customization (more tech differentiation and complexity) and novel materials like SiC and GaN.
Only use DUV (immersion & dry) lithography tools.
Growth in all segments with advanced and mature nodes driving investments, driven by multiple structural megatrends in our societies:
A $1-1.3tn market by 2030 (vs $600bn today) driven by datacenters, auto and industrial applications.
These chips ($600bn semiconductor market) are the backbone of modern society ($2-3tn electronics market) as they go into smartphones, vehicles, PCs, industrial, smart devices to provide computing, power, security and memory functions.
The semiconductor ecosystem is a $865bn EBIT juggernaut at the heart of our digital society.
AI: Servers, Datacenters & Storage is estimated to be the largest growth driver for semiconductors.
The semiconductor end market can be broken down into 7 categories: 1) Smartphone 22%; 2) PC 18%; 3) Servers, datacenters & storage 15%; 4) Industrials 13%; 5) Automotive 12%; 6) Other consumer electronics 11%; and 7) infra 9%.
The main growth driver from 2023-2030 should be servers, datacenters & storage, estimated at a CAGR of + 14% vs overall semi market +9%, powered by rising demands for AI-related computing and storage.
AI infrastructure is seeing unprecedented levels of investments and developments driven by technology giants like Alphabet, Meta, Microsoft and Amazon who are quickly expanding their capital expenditures (>$380bn in 2025) into servers and data centers to meet demand for generative AI, large language models and cloud services. These investments are expected to continue to accelerate near term with a focus on data centers equipped with high performance GPUs (like the new Nvidia Blackwell chips), their own custom silicon development and energy infrastructure to support AI workloads.
Digitalization & electrification: these trends are driving solid growth in automotive, industrial, and consistent growth in consumer electronics and smartphones. In PC, due to a longer replacement cycle, it is expected to see a pent-up demand from 2025 as Windows 10 will stop support from October 2025.
AI is the main growth driver of the semiconductor sector at the moment.
The biggest driver for the sector from this point forward is likely to be the TAM of accelerated compute/AI in data centers in the coming years (which Nvidia is actively trying to grow), as smartphones and PCs (the two historical growth engines for the sector are now mature and not growing).
This TAM (based on Nvidia’s GPUs) is believed to be around $400bn-$1tn by 2030.
Nvidia states that they have a TAM >$1tn which is based on Dell'Oro’s third party forecasts (a market research firm). Jensen believes the world is moving away from general purpose compute and fully into an accelerated computing platform.
Accelerated compute: There are $250bn/year of general compute that needs to be converted to accelerated compute as we are going from 0% share to a vast majority.
AI factories: Think of Stargate but all over the world, bringing AI workloads to all the sectors of the economy. These AI factories are not included in data center build numbers (as they don't exist yet).
Physical and Robotics AI: this is just going through initial testing and will need a massive build out but is probably 10 years away.
Nvidia will be the leader in these areas and totaling a $1tn+ market over time.
Mature node semiconductors are also seeing very strong growth in the age of electrification and digitalization. The opportunities mainly come from transition towards ADAS, EV, renewables and data centers etc.
Example of EVs: Dollar content for semiconductors in an EV is also increasing, almost 2x that of an ICE car and x5 for power semi content: The average semiconductor dollar content in an EV ($1300 per BEV) is almost 2x that of an ICE vehicle ($750 per ICE), with around 70% of the increased value coming from power semiconductors, mainly inverter. The remaining 30% increase comes from increasing needs for microcontrollers and sensors given accompanying stronger needs for infotainment, body & comfort. Moreover, the auto semi dollar amount in an EV is estimated to grow further by +53% up to $2000 through 2030.
A sector that never stops innovating: visibility for the next decade+
Materials Needed for Semiconductors
Semiconductor manufacturing uses as many as 300 different inputs and is dominated by Japan, US, Taiwan & South Korea:
Polysilicon: ultra-refined silicon (1000x times higher than that used for solar panels), suitable for use in semiconductor wafer production. Polysilicon is employed to make the silicon ingot that is subsequently sliced into wafers. China has a 64% production share for silicon-the most widely used material-but the US and its allies have large reserves.
Wafers ($11bn): Wafers are thin, disc-shaped materials on which chips are fabricated. Most wafers are pure silicon. Japan, Taiwan, Germany and South Korea have close to 100% market share (4 companies have 90% of the market) in high purity 300mm wafers which are necessary for supporting the smallest chip features sizes (<45nm).
Photomasks ($4bn, transparent plates containing a circuit pattern to be fabricated in a chip) & photoresists ($3bn, chemicals deposited on a wafer that, when exposed to patterned light passing through a photomask, selectively dissolve to form a circuit pattern): dominated by Japan and US.
Electronics gases (S6bn): US, France, Japan and Germany have large market share in gases (used for chemical vapor deposition), Merck, Air Products, Air Liquide are leaders.
Innovative Materials: compound semis taking over silicon?
Compound semiconductors offer significant advantages over Silicon. Compound semiconductors consist of more than one element (i.e. GaN/SiC/GaAs vs Si), they are also called V-III semiconductors and can interact to form crystalline compounds
-These semiconductors have several benefits over Si. They are highly efficient at converting light into electrical power and vice versa (good for high performance solar cells and all LEDs are based on this), they can "process" very high frequencies (electrons move fast within the material, important for charging) and can function even in very high temperatures But, it will only dominate in certain verticals and be more expensive than Si.
The semiconductor industry is shifting away from silicon and towards wide bandgap semis.
- SIC: EVs and industry.
- GaN: fast charging in consumer electronics, now entering data centers.
- MicroLEDs: future of display (first wearables then maybe smartphones).
Semiconductor roadmap: Moore's Law is alive but is pricier to maintain
Transistors
3 parts: the source, the drain and the gate.
Apply a voltage on the transistor and the electrons pass from the source to the drain.
Moore's Law becoming more complex
For the last 50 years: reduced the size of the gate.
Every 18 months, reduce the size of transistors by 2: 2003 90nm, 2005 65nm, 2007 45nm.
Each time it became more complex, but it was managed. However, now that the sizes are getting so extreme, the electrons do not stay in the right place:
To limit leaks from above: put on a layer of insulation.
To limit leaks from below: a system like SOI material from Soitec to capture the electrons.
Massive shift - changing the architecture of the elementary block (transistor) every 10 years:
Current leaks became too great.
Introduced FinFET in 2012: 3D architecture.
GAA (gate all around) arriving now: cylindrical.
Implications for capital intensity.
Moore's Law is still alive but is becoming more expensive:
Can continue miniaturization with new architectures.
It is more difficult to reduce costs by 10%/year.
Other 3D trends that are emerging: 3D NAND, DRAM & packaging.
Take advantage of this once in a generation opportunity to build long term wealth by investing in great stocks that will deliver returns for your portfolio for years to come.
The key steps to build a semiconductor:
Wafer: Wafer is a thin, circular semiconductor material, usually silicon, that is sliced from a high-purity boule. It serves as the substrate for semiconductor devices.
Deposition: Deposition puts a thin layer of insulating / conductive / semiconducting material according to the needs onto the wafer, using techniques such as chemical vapor deposition (CVD) or physical vapor deposition (PVD). Key players: Applied Materials / Tokyo Electron / Lam Research / ASMi.
Lithography: Lithography contains a series of steps to transfer the wanted circuit pattern onto the wafer. This involves applying a photosensitive material (photoresist) to the wafer, exposing it to ultraviolet light through a mask, and then developing the pattern onto the wafer. Key reason it's used is its ability to accurately transfer intricate circuit patterns onto the semiconductor wafer. Key players: ASML/ Nikon / Canon / Tokyo Electron (for resist).
Etch: Etching, either chemical or plasma, is used to remove the exposed areas of the wafer after litho, in this way creating the desired circuit patterns and structure. Key players: Lam Research / Tokyo Electron / Applied Materials.
Strip and clean: Strip and clean are used to remove the photoresist and any other residual materials from the wafer after litho and etching steps. Key players: Tokyo Electron / LAM Research / Applied Materials.
Repeat: Modern chips can have >100 layers, all of which need to be aligned on top of each other with nm precision.
Back end (testing and packaging): Individual semiconductor devices are tested for functionality and performance before being packaged into other forms. Mainly located in emerging markets (like Malaysia) as the processes are more labor intensive.
Semi market and Wafer Fabrication Equipment (WFE) market
Global semi market is estimated at $600bn in 2023, and is expected to grow at +8% (HSD) CAGR from 2022-30 to $1tn powered by continuingly expanding investments in servers, datacenters, automotive and other industrial applications, which is driven by secular trends of AI, 5G, electrification and digitalization.
WFE market is consolidated: To power the development of growing needs for semi, global WFE market is estimated to grow at +5% from 2022 $95bn to $145bn in 2030, indicating WFE share in the semi market of 15%.
Dominant by top 5 suppliers: AMAT, ASML, TEL, LAM, KLA. By phase: Cleaning, deposition and lithography account for top 3 of WFE market, with 31%/22%/19% share respectively.
Lithography: The key step in chip fabrication
What is lithography: Lithography is like a slide film. In theory, it is simple: need a light source, a mask (image to be projected) and a lens (for resolution).
In practice, it is complicated: the engraving is tiny (5nm), and needs to be very precise. Lithography contains a series of steps to transfer the wanted circuit pattern onto the wafer. This involves applying a photosensitive material (photoresist) to the water, exposing it to ultraviolet light through a mask, and then developing the pattern onto the wafer. As it is used to accurately transfer intricate circuit patterns onto the semiconductor wafer, it is of vital importance in the chip-making industry.
The technologies - EUV and DUV
In lithography, shorter wavelengths enable the production of smaller features. And the different names of lithography machines are based on the type of laser light source used in the lithography process.
DUV (Deep Ultraviolet): refers to light with a wavelength in the range of 193nm-365nm (broad concept) or 193-248nm (narrow concept). ASML has also developed DUV immersion systems which include a layer of purified water in order to improve the numerical aperture & thus enabling the production of smaller features.
EUV (Extreme Ultraviolet: refers to light with a wavelength of 13.5nm.
Theoretically, more advanced technology can replace prior technology, as it can significantly improve the resolution and the precision of the pattern printed. The concern is usually on productivity. The current ArFi model is expected to process 330 wafers per hour (wph) while the EUV model (3800) in 2023 can produce 195-220 wph. Therefore DUV (KrF, ArF, ArFi) can still be a better choice for less critical layers in advanced chips, particularly as they are significantly cheaper.
Lithography TAM - $18bn in 2022 to $28bn in 2030 (and 90% market share for ASML):
The WFE market is $95bn in 2022 going to $145bn in 2030 (+5% CAGR).
Lithography represents about 19% of WFE market, in which ASML currently maintains a 90% market share, rising from previous 50% in 2004 driven by increasing adoption of EUV in leading-edge chips. Lithography intensity is higher in more advanced chip technology. For a 3nm cutting-edge logic chip, the lithography intensity can go up to 40%.
Wavelength is the critical factor:
Machine generations are named according to the gas which emits in laser.
g-line 436nm.
i-line 365nm.
KrF Krypton-Fluorine 248nm.
ArF Argon-Fluorine 193nm.
immersion ArF (the air between the lens and the wafer is replaced by highly purified water) <45nm.
EUV 13.4nm.
Laser wavelength determines the size of the engraving that can be done (such as a 13.4m wide brush can make lines close to 13.4nm).
Problem before the introduction of EUV technology by ASML:
The industry remained at 193nm for a very long time but it needed to design transistor sizes of 90, 65, 45, 32, 22, 16, 10 nm, requiring a new technology to continue shrinking.
At 10nm: drawings had to be made 20x smaller than the wavelength.
The nm designation for chips has become more symbolic:
Historically, the nm or mm designation for chips referred to the size of the node in a chip, specifically the size of individual transistors within the semiconductor technology. As semi technology advanced, the size of the transistors shrank and the nm designation became a way to indicate the size and density of the components on the chip.
In recent years, chip manufacturers have moved towards using other metrics and terminology to describe the performance and capabilities of their chips, such as transistor density, power efficiency, and overall performance.
These metrics provide a more comprehensive view of the capabilities of a chip beyond just its physical size.
Proliferation of mature applications and technology sovereignty fuel need for new capacities
Why this decade will see massive capacity additions.
2020-25 drivers
-Mature nodes (+28nm, power, sensors, mature logic and analog ICs), ~x2 2020-25 capacity additions, require legacy tools (DUV). New applications mostly auto/industrial (smart electromobility, green industry, renewables, smart power grids, smartphone/loT)
-Advanced logic (-28nm): 70% growth over 2020-25 in cloud/server, AR/VR, mature nodes moving to advanced, larger die sizes
2030 drivers
Increased competition in foundries (Samsung and Intel trying to catch up with TSMC)
Technology sovereignty requirements: TSMC/Samsung in US, Intel in EU. Early stages will be material from 2025 onwards.
How did the Fabless and Foundries models emerge?
Unique feature: high level of investment in both R&D (22% + capital expenditure (26%).
Deep technical complexity + scale => endless effort on specialization => high specialization in each step.
The semiconductor industry ranks high simultaneously in both R&D and capital intensity.
Fabless: important characteristics
Fabless business model
The company designs and sells the hardware and semiconductor chips but does not manufacture the silicon wafers, or chips, used in its products;
Instead, it outsources the fabrication to a manufacturing plant or foundry.
IC design has been becoming more and more complicated. To cope with the complexity, IC design work has to be done in a hierarchical manner with common building blocks:
The building blocks can be internally made, things that the company built and can be reused.
They also can come from external IP vendors, which provide pre-built modules at a royalty and/or license fee => IP.
"Electronic design automation (EDA)" companies provide sophisticated software and services to support design.
Barriers to entry are relatively low because there are no fixed assets required.
Very R&D heavy, so access to talent & market is key - getting the right product at the right time.
Designing chips:
Design revenue geographic breakdown: 70% in US (Qualcomm, Broadcom, Nvidia, Xilinx), 20% in Taiwan.
EDA is very consolidated, and mainly in the US with the top 2 accounting for 70% market share (Cadence, Synopsys).
Foundries: important characteristics
The basic concept is to improve asset utilization by sharing semi factories, starting about 30 years ago.
Very "high tech" contract manufacturing - high customer switching cost, long collaboration lead time.
Catalyst for fabless which focuses on innovation to pursue relentlessly Moore's Law. Fabless has been growing much faster than IDMs over the past few decades.
Scale is important to pay for the heavy capex and R&D; making this a "winners take all" business.
Consolidated market with TSMC as the leader.
TSMC has 70% of revenue share and >100% of profit share of Global Foundry business.
It is impossible to be fully self sufficient in semis, this is why the sector is so globalized:
What does "self-sufficiency" mean: Having domestic firms in EDA and IP cores, chip design, raw materials, manufacturing equipment, wafer fabrication, and assembly, packaging and testing - meet 100% of the domestic semiconductor consumption across all applications.
This would cost a gigantic amount: Between $900bn-$1.2tn in R&D + Capex which is 6x of total R&D + Capex of the industry in 2019. This is a number from 2019 so in 2025 this is likely much much higher.
This explains why global cooperation is a far better solution for every region and is the best solution from an economic point of view.
US semi consumption and the push to reshore
The US consumes >30% of the total global semi sales (>$100bn/year). This is made up of 34% advanced logic, 18% other logic, 28% memory and 23% DAO (discrete, analog & others). And of this 34% in advanced logic only 9% is for critical infra (think defense & aerospace, telecom, energy, medical equipment, data centers for critical sectors).
Longer term upside for semi production from potential sovereign investments (that could add 5-8% of extra capacity worldwide) for tech sovereignty and supply security reasons. Those could happen in the US/EU/Korea/Japan to replace the ultra-dominance of Taiwan in advanced semiconductor manufacturing (>90% of advanced chips produced). For example, ASML has already received orders from Rapidus, a brand new leading edge foundry created in Japan, for its first fab (still in its early days).
Semiconductor value chain
Semi equipment makers:
Front end process: ASML, ASMi, Applied Materials, Lam Research, KLA, Tokyo Electron
Back end process: Besi, ASMPT, Kulicke And Soffa, Disco, Camtek
OSAT (testing, assembly and packaging): ASE, Amkor
Materials/Silicon wafers: Siltronic, Globalwafers, ShinEtsu
Foundries: TSMC, Intel, Samsung, UMC, GlobalFoundries
IDMs:
Memory: Samsung, Micron, SK Hynix, Kioxia, WD
Auto/Analog: Infineon, STM, Texas Instruments, Monolithic Power, Renesas, Analog Devices, Microchip, On Semi, NXP (fabless)
Fabless:
Compute/data center/networking: Nvidia, Broadcom, Marvell, AMD, Astera Labs, Coherent, Credo (all the hyperscalers due to their ASIC efforts, AI chips, to balance Nvidia)
Communications: Apple, Qualcomm, Broadcom, Mediatek
IP/EDA Providers: ARM, Cadence, Synopsys, Siemens
And many many other companies and verticals.
Take advantage of this once in a generation opportunity to build long term wealth by investing in great stocks that will deliver returns for your portfolio for years to come.
China Industry Overview
China’s semiconductor industry represents decades of technological aspiration and escalating geopolitical pressure. China’s strategy is complicated as they are playing both offence and defence. Defensively, they are attempting to construct a self-reliant domestic ecosystem capable of withstanding foreign sanctions. Offensively, they are trying to leverage its industrial capability in mature-node manufacturing to create new global dependencies.
The foundational drive of this strategy is their “Made in China 2025” policy (a whole nation mandate aimed at achieving technological sovereignty). This ambition has been powered by over $150 billion in state-directed capital, most notably through the “Big Fund” implementation. The scale of this domestic market is immense; in 2024, China's semiconductor market reached a value of $227.2 billion, representing a 21.9% growth over the previous year and accounting for over half of the entire Asia-Pacific market. Projections indicate the market is forecast to nearly double to $413.6 billion by 2029, driven by strong domestic demand.
In response to severe U.S. export controls targeting its access to leading-edge technologies, China has changed its strategy. It is now focused on overwhelming the global market with mature-node semiconductor capacity, which serves its booming electric vehicle and renewable energy sectors. But alongside this, it is also pursuing a slower path of innovation in critical technologies such as advanced lithography and Electronic Design Automation (EDA) software, where it remains vulnerable.
This group is led by the foundry Semiconductor Manufacturing International Corporation (SMIC), memory producers Yangtze Memory Technologies (YMTC) and ChangXin Memory Technologies (CXMT), and a growing list of domestic equipment makers including AMEC and Naura Technology Group. While these firms have achieved remarkable progress, they remain technologically several generations behind global leaders in producing the most advanced chips.
Venture funding and initial public offerings are targeting companies in automotive chips (e.g., Suzhou Flagship), advanced materials (e.g., Xi'an ESWIN Material Technology), and next-generation compound semiconductors (e.g., Ganext), are signaling where the next phase of development is focused.
It’s quite clear where the strategic outlook for China is, while full self-sufficiency in leading-edge technology by 2030 is basically impossible, they are still determined to become a dominant force in the more mature semiconductor segments.
Ambition
China’s rise in the semiconductor industry is deliberately due to their ability to think extremely long-term.
The "Made in China 2025" (MIC 2025) initiative, launched by Premier Li Keqiang in 2015 is one of their main long-term strategies. This comprehensive 10-year plan was designed to modernize the nation's industrial capability, reduce its heavy reliance on foreign technology imports, and propel it up the global value chain in ten strategic sectors.
Within this framework, semiconductors, categorized under "advanced information technology," were identified as a technology of paramount importance. As early as 2014, President Xi Jinping had noted that semiconductors were a "core technology that China should produce domestically," recognizing their critical position at the intersection of national security and the high-tech growth industries prioritized by the Chinese Communist Party (CCP). MIC 2025 set the ambitious goal of achieving 70% self-sufficiency in the domestic content of core components and materials by 2025. While this specific target is now widely acknowledged as unattainable within the original timeframe, its declaration served as a powerful signal of intent, laying the strategic groundwork for the massive mobilization of resources that followed.
The central financial engine of MIC 2025's semiconductor ambitions is the National Integrated Circuit Industry Investment Fund, colloquially known as the "Big Fund." Established in 2014, this state-backed investment vehicle was designed to channel unprecedented levels of capital into the domestic industry, departing from previous models of direct subsidies in favor of a more market-oriented approach of taking equity stakes in promising companies. The fund has been rolled out in three distinct phases, each reflecting an evolution in strategy:
Phase I (2014-2019): With an initial capitalization of approximately $21.8 billion, the first phase focused heavily on building scale in manufacturing. Around 60-70% of its capital was deployed into front-end manufacturing and wafer fabrication projects, with key early investments directed at foundational players like SMIC and the nascent memory champions YMTC and CXMT.
Phase II (2019-2024): The second phase raised over $35 billion and continued the focus on wafer fabrication. However, its investment approach became more conservative and targeted, aiming to strengthen the entire industry chain, including equipment, materials, and packaging, following some high-profile failures and inefficiencies from the first phase.
Phase III (2024-2029): In a clear signal of redoubled commitment amidst escalating U.S. restrictions, the third phase was recapitalized with a massive $47.5 billion. This latest tranche is expected to pivot from broad capacity building to targeting critical bottlenecks in the supply chain, such as semiconductor manufacturing equipment (SME) and advanced materials. It is also anticipated to direct significant investment toward strategic AI-related technologies like High-Bandwidth Memory (HBM).
The Big Fund's influence extends far beyond its direct capital injections, which total over $95 billion across the three phases. By making high-profile, strategic investments, it acts as a powerful signaling mechanism to the entire domestic market. It de-risks subsequent investment from private venture capital, local government funds, and other state-owned enterprises, effectively aligning the nation's entire capital allocation machinery with the CCP's strategic goals.
Central coordination vs. local competition
A defining and somewhat paradoxical feature of China's industrial policy is its dual-track implementation. While the central government in Beijing sets the overarching national strategy (such as the creation of national champions) provincial and municipal governments are granted significant financial resources and autonomy to support local firms.
This structure creates intense competition between localities. For example, the city of Hefei became the primary backer of DRAM maker CXMT, Wuhan started NAND champion YMTC, and Shenzhen has heavily subsidized its own local ecosystem. Each region aims to build a fully self-sufficient, vertically integrated local supply chain, often with little regard for national comparative advantages.
By funding multiple, competing approaches to solving technological challenges across different regions, it increases the statistical probability of a breakthrough. This Darwinian internal competition incentivizes entrepreneurs to innovate and cut costs, with the most capable firms eventually rising to become national champions worthy of central government support. This inherent redundancy builds a more robust domestic supply chain that is less vulnerable to single points of failure that characterize the geographically concentrated supply chains of the West.
Strategies for Technological Sovereignty
Weaponizing Legacy Tech
China's most significant strategic pivot in response to being cut off from leading-edge technology has been a massive, state-subsidized expansion of manufacturing capacity in mature process nodes (defined as 28nm and older). In the first half of 2024 alone, China's investment in semiconductor manufacturing equipment reached $25 billion, a figure that surpassed the combined spending of the United States, South Korea, and Taiwan. China’s strictly local transactions have also been impressive.
Second, The U.S. "small yard, high fence" policy, which focuses stringent controls on a narrow set of advanced technologies, has left the much larger "yard" of mature technology open for competition. By flooding this market with subsidized capacity (with plans to add more than 18 new fabs in 2024 alone) China aims to drive down global prices, making it economically unviable for Western firms to compete in these lower-margin but high-volume segments. This has stoked widespread fears of oversupply and dumping. The long-term goal appears to be the creation of a reversed dependency, where Western automotive, industrial, and consumer electronics sectors become reliant on a Chinese-controlled supply of foundational chips, granting Beijing significant leverage in future geopolitical and trade disputes.
Local Supply Chain
China’s main goal is to develop domestic alternatives in the upstream segments of the semiconductor value chain where they are most vulnerable to foreign chokepoints.
Semiconductor Manufacturing Equipment (SME): Progress here is uneven. Domestic firms like Advanced Micro-Fabrication Equipment (AMEC) and Naura Technology Group have made significant progress in non-lithography tools, such as etching and deposition equipment. Their achievement in some self-sufficient steps allows Chinese fabs to reduce their reliance on foreign suppliers like Lam Research and Applied Materials. But lithography remains the most critical gap. Shanghai Micro Electronics Equipment (SMEE) is China’s leading lithography tool maker, but its most advanced systems are capable of producing chips at the 90nm node, which is quite literally generations behind the EUV systems produced by Dutch firm ASML.
Electronic Design Automation (EDA): The EDA market (which provides the essential software for chip design) is a near-monopoly controlled by three western firms: Synopsys (US), Cadence Design Systems (US), and Siemens EDA (Germany). Recognising this dependence, China is aggressively pushing domestic EDA companies like Empyrean Technology, Xpeedic, and Primarius Technologies. These emerging players are often staffed by seniors engineers with years of experience at the very U.S. firms they now compete against, accelerating their development cycle.
Materials & IP: China is leveraging its geopolitical strengths, such as its near-monoply on the processing of rare earth materials like gallium, as a strategic counter-lever in trade negotiations. Regarding intellectual property, it is heavily promoting the adoption of RISC-V, an open-source instruction set architecture. By investing heavily in this, China is trying to create a viable alternative to the dominant proprietary architectures from UK-based Arm (this would mitigate the risk of being cut off from chip design IP).
Tactics of Circumvention and Adaptation
Chinese firms have also cleverly used a range of measures to bypass/adapt to sanctions. These include creating opaque shell companies to procure restricted equipment, extensive stockpiling of chips and tools ahead of new restrictions, and using third-country cloud computing platforms to access high-performance computing power without owning the hardware.
Perhaps the most significant adaptive strategy has been a combination of reverse-engineering and process innovation. The breakthrough 7nm chip found in Huawei’s Mate 60 Pro (manufactured by SMIC) showed this capability.
This showed that by pushing older-generation Deep Ultraviolet (DUV) lithography tools to their absolute limits with techniques like multi-patterning, it was possible to produce chips far more advanced than Western policymakers believed feasible without access to ASML’s EUV machines.
Human element: Getting Talent
For years, China has used state-sponsored talent recruitment programs, most famously the “Thousand Talents Plan” (TTP) to attract top-tier, foreign-trained Chinese and international scientists with lucrative financial packages and research funding. These programs have been flagged by the U.S. intelligence agencies for aggressively targeting individuals with access to sensitive intellectual property and for incentivizing illicit transfer.
Despite this, China still faces a severe talent gap. The country is projected to have a shortfall of over 200,000 semiconductor professionals. Unfortunately, just 13.8% of Chinese graduates with degrees in integrated circuits or similar fields chose to enter the semiconductor industry, with many being lured away by higher-paying and more prestigious jobs in software and artificial intelligence. Money can build fabrication plants, but it can’t instantly create the decades of accumulated knowledge.
Major Industry Players
China’s strategy has nevertheless created a group of national leaders. These firms are backed by significant state investment and a protected domestic market.
Semiconductor Manufacturing International Corporation (SMIC) is China's largest and most technologically advanced pure-play foundry. It’s a partially state-owned enterprise and a major recipient of Big Fund investment. Headquartered in Shanghai, it operates multiple fabs across China and provides manufacturing services on process nodes ranging from mature 350nm down to a reported 7nm process. The company's breakthrough in producing a 7nm-class chip for Huawei's Mate 60 Pro smartphone in 2023 was a landmark achievement, showing China’s ability to innovate around U.S. sanctions. Despite this, the company's operational performance has been impacted by restrictions, with U.S. export controls barring Western tool suppliers from providing maintenance, leading to yield fluctuations and increased costs. Financially, SMIC has shown strong revenue growth, reaching $8.0 billion in 2024, but its net income and gross margins have been pressured by these operational challenges and heavy capital expenditures required for its expansion. Financial reports from fiscal year 2023 noted revenues of $6.3 billion, though with pressure on operating and net margins due to the challenging geopolitical and operational environment. As of 2024, it is the world's third-largest contract chip maker by revenue.
Hua Hong Semiconductor is China's second-largest foundry and a key player in the nation's strategy to reduce dependency on foreign suppliers for specialized chips. Unlike SMIC, Hua Hong focuses on mature but critical technologies, including embedded non-volatile memory (eNVM), power discrete devices, and analog chips. These components are essential for the automotive, industrial control, and consumer electronics sectors. The company's most advanced node is 28/22nm, achieved by its subsidiary Shanghai Huali (HLMC). By concentrating on these high-demand, mature-node segments, Hua Hong plays a vital role in China's domestic substitution strategy, controlling an estimated 10-15% of the country's chip production market for these applications. In fiscal year 2023, the company reported revenues of CNY 16.2 billion.
Yangtze Memory Technologies Corp (YMTC) and ChangXin Memory Technologies (CXMT) are the twin pillars of China's push for self-sufficiency in memory chips. YMTC, founded in 2016 with backing from Tsinghua Unigroup and the Big Fund, specializes in 3D NAND flash memory and has rapidly reached the global technological frontier, developing advanced chips that compete directly with products from global leaders like Samsung and Micron. CXMT, based in Hefei, is China's premier DRAM manufacturer, producing LPDDR4 and DDR4 memory on a 19nm process and developing next-generation (LP)DDR5 technology. Together, these two state-backed champions have built an impressive domestic memory industry from a near-zero base in under a decade, a critical achievement given memory's importance for everything from data centers to consumer devices.
Emerging Innovators Watchlist
Looking at investment trends (2024-2025)
Aggregate transaction data from Q2 2024 to Q3 2025 shows a sustained flow of capital into the semiconductor sector. While the number of transactions has fluctuated, the values have remained substantial, peaking at over $2.1 billion in Q4 2024.
Funding rounds are conspicuously directed at companies operating in critical upstream and high-growth segments.
The recent ones are:
- Advanced Materials: The planned IPO of Xi’an ESWIN Material Technology highlights a focus on securing the domestic supply of foundational materials like silicon wafers.
Photomasks: The venture round for New Ray Mask Technology (a component in lithography process) is directed at building out the entire lithography ecosystem.
Automotive Semiconductors: The Series C funding for Suzhou Flagship (also known as Flagchip), backed by strategic investors like Xiaomi, points to the need to address chip shortages in China’s EVs.
Compound Semiconductors: The Series B funding for Ganext indicated investment in next-gen materials like gallium Nitride (GaN), which offers a path to “change lanes” and compete in future power electronics applications.
The participation of state-affiliated investors is a coordinated effort to create a next generation of strategically important companies for China.
Watchlist Profiles
Outlook and Challenges
After a decade, China has built a respectable ecosystem with resilience in the face of external pressure. However, their ultimate goal of being a leader is still quite far away.
Year 2030: Reality Check
The targets set in “Made in China 2025” are powerful catalysts, but a realistic view is that true self-sufficiency (defined as nodes below 7nm) by 2030 is not likely. China remains several years behind leaders like TSMC and Samsung.
Instead of achieving parity across the board, China’s more probable outcome is that of a ‘fast-follower’. It will likely succeed in establishing a dominant position in mature and trailing-edge technologies. This will allow it to achieve a high degree of self-reliance for the vast majority of its domestic industrial and consumer needs while continuing to chip away at the technological lead of the West. However, the economic momentum is undeniable. The Chinese semiconductor market is forecast to grow at a compound annual growth rate (CAGR) of 12.7% between 2024 and 2029, reaching a projected value of $413.6 billion. This growth is underpinned by the rapid adoption of advanced technologies such as artificial intelligence (AI), the Internet of Things (IoT), and 5G connectivity, all of which depend heavily on a massive supply of chips.
Unbreakable Chokepoints
EUV Lithography: The greatest obstacle to leading-edge manufacturing is access to Extreme Ultraviolet (EUV) lithography machines, a market where Dutch firm ASML holds a 100% monopoly. These machines, which cost upwards of $200 million each, are essential for patterning the smallest features on advanced chips. U.S.-led export controls have effectively blocked China’s access to this technology. Developing a domestic EUV alternative is a huge scientific and engineering challenge, likely needing decades of sustained effort, making this the industry’s hardest chokepoint.
EDA & Core IP: The design of every modern semiconductor relies on sophisticated Electronic Design Automation (EDA) software. The market is dominated by a trio of Western companies (Synopsys, Cadence, and Siemens EDA) creating another vulnerability. While domestic alternatives like Empyrean Technology are emerging, they do not yet offer the comprehensive toolchains required for designing the most complex chips.
Tacit Knowledge: Beyond hardware and software there is the irreplaceable asset of “tacit knowledge” (which is the decades of accumulated experience required to operate a leading-edge fab at high yield and efficiency). This expertise cannot be bought or quickly replicated. China’s talent gap and its struggle to retain its own top graduates in the manufacturing sector mean that even if it could get the best equipment it would still struggle to operate it competitively.
The United States’ Response
In response to China's determined push for technological sovereignty and the stark supply chain vulnerabilities revealed in recent years, the United States has executed a historic pivot in its own industrial strategy. Abandoning a decades-long reliance on a globalized, hyper-specialized model, the U.S. is now actively reshoring critical manufacturing, restricting its chief geopolitical rival's access to key technologies, and rebuilding its domestic semiconductor ecosystem.
The CHIPS and Science Act
The centerpiece of the American strategy is the CHIPS and Science Act of 2022, a landmark piece of legislation that marks a significant return to direct industrial policy. The act allocates approximately $52 billion in federal funding to revitalize the domestic semiconductor industry. Its primary goals are to incentivize the construction of new fabrication plants (fabs) on U.S. soil, improve domestic research and development, and cultivate a skilled workforce.
This funding has catalyzed a wave of investment from both domestic and international industry leaders. U.S. champion Intel, along with global giants TSMC and Samsung, have committed to building advanced new fabs in states like Arizona, insulating them from future trade penalties and securing government subsidies. The policy is a direct strategic counter to China's long-standing state support, aiming to create a more resilient and geographically diversified supply chain, particularly for the leading-edge chips essential for defense, AI, and critical infrastructure.
"Small Yard, High Fence"
Complementing its domestic investment, the U.S. has deployed a powerful offensive strategy centered on export controls. This approach, described as a "small yard, high fence," involves imposing stringent restrictions on a narrow set of advanced technologies deemed critical to national security, while allowing broader trade to continue.
Beginning in October 2022 and progressively tightened since, the U.S. Department of Commerce has implemented sweeping controls designed to slow China's progress in AI and high-performance computing. These restrictions target the key chokepoints in the semiconductor value chain:
Advanced Chips: Exports of high-performance logic chips (initially 14nm and below) and the high-bandwidth memory (HBM) required for AI accelerators are restricted.
Manufacturing Equipment (SME): The export of advanced semiconductor manufacturing equipment is tightly controlled. This has been executed in coordination with key allies, namely the Netherlands (ASML, the sole producer of EUV lithography machines) and Japan, a leader in various SME categories.
EDA Software: Access to the sophisticated Electronic Design Automation (EDA) software from U.S. firms like Synopsys and Cadence, which is essential for designing complex, leading-edge chips, has been curtailed.
This strategy aims to prevent China from acquiring or domestically producing the world's most advanced semiconductors, thereby preserving the U.S. and its allies' technological lead.
Blocking Technology Acquisition via CFIUS
To prevent China from acquiring sensitive technology through corporate takeovers, the U.S. has increasingly utilized the Committee on Foreign Investment in the United States (CFIUS). This inter-agency body reviews foreign investments for national security risks and has become a critical tool in the tech competition with China.
A good example is the terminated acquisition of Magnachip Semiconductor by the Chinese private equity firm Wise Road Capital in 2021. Although Magnachip is a South Korean company, its listing on the New York Stock Exchange and incorporation in Delaware gave CFIUS jurisdiction. CFIUS intervened, citing unspecified "risks to the national security," and ultimately blocked the $1.4 billion deal, forcing the parties to abandon it. This case sent a clear signal that the pathway for Chinese entities to acquire foreign semiconductor assets and intellectual property is now heavily restricted, forcing China onto the more arduous path of indigenous innovation.
Market Disruption and Geopolitical Fallout
China’s strategy’s most immediate impact will be felt in the mature-node segment. The massive, state-subsidized expansion of Chinese capacity poses a credible threat of a global price collapse, which could drive non-subsidized international competitors out of the market and create a new supply chain dependency on China for more foundational chips.
The escalating tech rivalry also increases the likelihood of a bifurcated global tech environment. A future where one side operates on the Western-designed and -defined tech standards and another operates on Chinese standards.
Finally, the geopolitical barriers to China are hurtful. The 2021 termination of Chinese private equity firm Wise Road Capital’s attempted acquisition of Magnachip Semiconductor (which was blocked by the Committee on Foreign Investment in the U.S. (CFIUS) on national security grounds) acts as a landmark case. It clearly shows that acquiring foreign tech and assets is closed to Chinese firms, forcing them to do indigenous development which is slower and more costly.
Thank you for reading this post. I urge all readers to use this a a roadmap for semiconductors as it is one of the most comprehensive free to access articles around. If you enjoyed this post, consider subscribing to The Small Cap Strategist and Ozeco.
Disclaimer: This post is for informational and educational purposes only and should not be considered investment advice. The author is not a financial advisor. All investment decisions carry risk, and readers should consult with a qualified financial professional before making any investment choices. The author may or may not hold positions in the securities discussed. This post may not be an accurate reflection of the related companies. You can find our full disclaimer in our About Me.
 | A guest post by
|
An excellent read which has given me a lot to think about. I look forward to your coming posts if you maintain this rigorous standard to what you write.
For more than 20 years, I have worked in semiconductor field as Director of R&D, Manager of Manufacturing. As such, I appreciate your deep dive into semiconductor field. Currently, I follow closely all SOXX components through my UVCMI model, keep up the great work.